This chapter gives an up to date overview of the robotic platforms currently being created and their characteristics.


Control system platforms and their components are outlined in this chapter.

ASIC & FPGA IP modules

6 various more and less specialized CPU cores, 11 SoPC (System on a Programmable Chip) and over 50 various IP controllers are briefly outlined in this directory. Some IPs are silicon proven and available free of charge and royalty free under the open license.

All the designs are implemented in Verilog Hardware Description Language (HDL) only.

The microprocessor library contains:

  • AQUARIUS – 8bit ultra small RISC Von Neumann architecture controller for the FPGA/CPLD implementation, custom Instruction Set Architecture (ISA);
  • ZOOMLOG – 16bit RISC Von Neumann CPU, op-code backwards compatible with Z80;
  • IRIS 32/32 – 32bit Harvard architecture dual-core heterogeneous processor with the custom ISA;
  • IRIS 64 – 64bit Harvard architecture single-core processor with the custom ISA and hardware multitasking;
  • RETINA24 – 24 bit Harvard architecture 8 Processing Elements (PE) specialized processor for video applications with the custom ISA.

The peripheral library consists of:

  • MEMORY controller section (multi-port Synchronous SRAM, SDR SDRAM, DDR SDRAM, DDRII SDRAM)
  • External bus controller section (PCI, I2S, I2C, SPI, proprietary, etc)
  • Specialized accelerators (fixed point math accelerators, CORDIC, VIDEO scripted DMA, AUDIO DMA, BLITDMA, etc)
  • Silicon proven designs (PAL/NTSC/SECAM digital video encoder, PAL/NTSC digital video decoder, R16 ultralight 16 bit CPU core). Available both in Verilog and VHDL languages.

The detailed content is yet to come….


RIM-I and RIM-II robots run under the hard real-time preemptive deterministic Real-Time Operating System (RTOS) implemented in the mix of assembly and C language.

Real-Time Robotic EXecutive (RTREX) is the embedded OS with the hard Real-Time scheduling, 64 priority levels and Round-Robin task switching within the same priority level. It has debuted in 2008 Hannover German Open robotic competition and then underwent a series of improvements and modifications.

The detailed content is yet to come….


Little C Compiler (LCC) was ported and code generator was adapted to support the IRIS32/32 and IRIS64 ISA.

The detailed content is yet to come….